In my previous post I explained how to decide when you need a buck converter rather than a linear regulator. In this post I am going to explain how to build a buck converter into your project.
Drop in replacement
The simplest option, if you are used to using a linear regulator in a TO-220 package, is to buy a drop in replacement. For example Adafruit sell 1A 5V and 1A 3.3V drop in buck converters for just under $15 at the time of writing. Or for around $4.30 you could get a muRata OKI-78SR 1.5A 5V or 1.5A 3.3V module from DigiKey or Mouser.
From China
You can get small buck converters from China for a dollar or less, for an example search for Mini-360 buck converter. These are usually small PCBs with connection holes suitable for a wire or a header pin. The hole spacing is rarely breadboard compatible, but you can attach wires or carefully bend long header pins. They typically don’t come with datasheets, so you might want to test them before depending on the maximum advertised specifications. Shipping is slow, but you can’t beat the price.
Make your own
Finally you can make you own buck converter. Some reasons for building one yourself:
- It is a great learning experience
- You have complete control over and knowledge of the specifications
- You can design the buck converter into the same PCB as the rest of your project
Picking components
There are thousands of buck converter ICs available. Your voltage and current requirements will help to narrow the field, but there will still be a large number to choose from. Other considerations are efficiency, frequency, circuit size, the number of external components, features, availability and price.
Small, simple and cheap
A common requirement is for a circuit that takes up a relatively small amount of board space at a reasonable cost. Unless you need a large amount of power a buck converter with built in MOSFETs will be ideal. While all in one modules do exist, they are currently much more expensive, so a few external components such as an inductor, capacitors and resistors are to be expected.
Efficiency, frequency and package
Improved efficiency means less heat is generated, requiring less space for thermal management, for this reason prefer synchronous designs that substitute a less efficient flyback diode for a second MOSFET. Higher frequency switching allows for smaller inductors and capacitors leading to a smaller design. Choose a package that matches you skills, avoid small packages like BGA unless you are used to working with them.
A handy search tool
Texas Instruments have a large number of buck converters, and nice tools for picking designs, you can try entering your criteria into the Power Quick Search tool.
And the winner is
My criteria for a recent project was a 12V input, 5V output and <500mA. I chose a Texas Instruments TPS560200 with the following specs:
- 4.5V to 17V input
- 0.8V to 6.5V output
- 500mA maximum current
- Synchronous
- 80% efficiency
- 600 KHz switching frequency
- SOT-23 package
- Light load efficiency, thermal protection and over current protection
- Price about $0.89 for one, about $0.36 each for a real of 3000
This is a five pin SOT-23 surface mount component with about 0.04″/1mm lead pitch which should be manageable as a first surface mount design.
Picking passive components
A buck controller will generally need to be paired with the following components:
- Input capacitor
- Inductor
- Output capacitor
- Voltage divider resistors
The datasheet will provide guidance on how to pick the components. If you are using a TI buck controller then you can also use their WeBench tool to help you pick the right components for your design.
I don’t recommend the schematic and layout export from WeBench. My experience was that none of the wires were connected in the schematic and the board layout wouldn’t import into the free version of Eagle CAD.
Equivalent series resistance
In power circuits the capacitors are normally moving large amounts of current, so the equivalent series resistance, ESR, becomes an important consideration. For instance a typical 22uF electrolytic capacitor might have an ESR of 10 ohms whereas a multilayer ceramic capacitor might have an ESR of 10 mOhms (1/1000th).
In general:
- Use ceramic multilayer XR5 or XR7 capacitors as they have very low equivalent series resistance. Otherwise look for low-ESR capacitors
- You will generally pair a high frequency input bypass capacitor, usually 0.1uF, with a larger bulk capacitor, e.g. 10uF
- You can use two capacitors in parallel to lower the ESR
Layout guidelines
There a several things to consider when laying out your circuit:
The current loop has high current slew rate so needs to be kept as small as possible to reduce parasitic inductance
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- Place the input bypass capacitor (small, high frequency) close to the IC
- The input bulk capacitor should be reasonably close to the IC
- Place the output capacitor close to the inductor
- Connect directly to the ground plane
Removing heat
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- Use copper pours to improve heat dissipation
- Use thermal vias to move heat to the bottom of the board
Watch out for noise from switching
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- Place the inductor close to the IC
- Don’t expand copper to the inductor beyond what’s required for current
- Keep the feedback return path away from the inductor and input capacitor
To improve efficiency
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- Don’t run ground plane under the inductor
Putting the rules into practice
Here is an example PCB layout for 5V 500mA Buck converter with breadboard friendly headers. U1 is a Texas Instruments TPS560200 buck controller IC. C1 and C2 are 10uF output capacitors. C3 is a 0.1uF input bypass capacitor and C4 is a 10uF input bulk capacitor. The R1 and R2 resistors act as a voltage divider on the feedback from the output to the IC. The ratio of the voltage divider determines the output voltage.
To minimize parasitic inductance in the current loop, the inductor and input capacitors are right next to the IC and the output capacitors are placed right next to the inductor. These current loop components are connected directly to a top layer ground pour which is connected to the bottom layer ground plane with lots of vias.
To maximize heat dissipation there are thermal vias underneath the IC and in the ground pour close to the IC to help move heat to the large ground plane on the bottom of the board. As this package doesn’t have a thermal pad around 40% of the heat will dissipate through the pins, so there are large pours connected to the ground pin and Vin pin.
To minimize switching noise the inductor is close to the IC and the connection to the IC hasn’t been expanded into a large copper pour. The traces and voltage divider resistors for the feedback signal have been routed away from the inductor.
Efficiency is optimized by adding a cutout in the ground plane under the inductor to avoid inductor efficiency being reduced by eddy currents forming in the ground plane.
Tented vias
Some of the thermal vias (smaller green circles) are very close to the SMD pads. This introduces some risk of an accidental connection to ground if the solder from the pads were to stray to the exposed copper of the via. To avoid this risk we can arrange for each via to be covered in solder mask, the term for this is a tented via.
In the board above, ordered from OSH Park, you can see the 16mil tented vias. The annular rings of the small tented vias are covered in purple solder mask, whereas the annular rings for the large header pin vias are exposed.
Eagle CAD
To make small enough vias to fit under the package for your IC you may need to specify a new drill size if one of the default drill sizes isn’t appropriate. In Eagle CAD you can select a new 16mil drill size by selecting:
Change –> Drill –> … (New Drill)
Entering 0.016 (or 16mil) and then clicking on any existing vias you want to resize or using the “Draw a via” tool to create new vias.
The Eagle DRC (Design Rule Check) rules in Eagle typically specify that vias over a certain size should always have a stop mask. That is the copper annular ring should not be covered in solder mask.
To ensure the thermal vias are tented (covered in solder mask) you should change the DRC rules so the stop mask is only automatically applied to vias larger than your selected tented via size, e.g. 16mil
Tools –> DRC –> Masks –> Limit –> 16mil
Then for vias 16mil or smaller you will be able to turn the stop mask on or off in the via properties.
KiCad
Creating thermal vias, also referred to as via stitching, can be confusing in the current version of KiCad as lone vias created by the Tracks And Vias tool will become disconnected from the GND net when you refill the filled zones or run DRC. There are plans to address this in version 5.0 of KiCad, but until then there are a couple of workarounds.
The simplest, if not the prettiest, is to make sure that your vias are connected to a GND pad with a track. The tracks will be absorbed by the copper pour (filled zone) so they don’t affect the final PBC.
The other solution is to create a new “via” footprint in Footprint Editor and add this footprint directly to your board in PcbNew.
To create a via footprint:
- Launch Footprint Editor
- Click New Component
- Make the Name and Ref text Invisible
- Add a pad at the origin (x=0, y=0)
- Edit the pad
- Set Copper to All Copper Layers
- Remove F.Mask and B.Mask from Technical Layers to make the via tented
- Set the hole size (e.g. 0.016″) and pad size (e.g. 0.03″)
- Set Copper Zones Pad Connection to Solid
- Save to an existing or new library with a name like via-16mil
To add the via footprint to you board
- Click Add Footprint in Pcbnew
- Click on the board and select your new via footprint (e.g. via-16mil)
- Edit the pad (not the footprint)
- Set the Net Name to GND
You can do this again to add another via or use Duplicate Footprint to copy an existing via footprint.
A finished example
Here is an example of a completed breadboard friendly 5V buck converter.
